SPIRAL Tutorial @ ASPLOS '26

Overview

Emerging applications, from AI and cryptography to scientific computing, are driving a rapid proliferation of new architectures, ranging from lightweight CPU ISA extensions to fully customized accelerators. However, evaluating a new ISA or accelerator remains notoriously difficult, time-consuming, and costly: evaluators must hand-optimize application kernels for hardware whose architecture and toolchain are still evolving, often in the absence of a mature compiler, operating system, or performance analysis framework.

This tutorial introduces a systematic methodology for pre-silicon and early-prototype performance estimation that enables informed stop-or-go decisions long before complete hardware or software stacks exist. We begin with SPIRAL, a code generation system developed over 25 years through academic, industrial, and government collaborations, which automatically produces highly optimized code for emerging architectures.

We then demonstrate how to enable hardware-software co-design at the earliest stage by defining a fixed C-level function API as a stable interface between the two. Once this API is defined, SPIRAL can automatically target it and generate optimized, non-trivial kernels for benchmarking and performance evaluation. To close the loop, we introduce performance projection with proxy ISA (PISA), a fast and accurate performance estimation technique that predicts runtime performance without requiring an implemented microarchitectural model. By the end of the tutorial, attendees will understand how to use SPIRAL for early-stage performance evaluation and hands-on kernel generation for novel hardware prototypes.

Tentative Schedule

Organizers & Speakers